insideHPC

RISC-V International Unveils Fast Track Architecture Extension Process and Ratifies ZiHintPause Extension

Zurich – Feb. 23, 2021 – RISC-V International, a non-profit corporation controlled by its members to drive the adoption and implementation of the free and open RISC-V instruction set architecture (ISA ...
Business Wire

Imperas Delivers First RISC-V Simulator for New Vector and Bit Manipulation Specifications to Lead Customers

OXFORD, England--(BUSINESS WIRE)--Imperas Software Ltd., the leader in virtual platforms and high-performance software simulation, today announced the delivery of its updated simulator for the RISC-V ...
Business Wire

Smaller Code, Higher Performance: Latest IAR Embedded Workbench for RISC-V Leverages CoDense™ from Andes

UPPSALA, Sweden--(BUSINESS WIRE)--IAR Systems®, the world leader in software and services for embedded development, has just announced the full support of their latest release of IAR Embedded ...
AppleInsider

New Geekbench update adds RISC-V and improves ARM Extension Support

Benchmarking tool Geekbench has been updated to version 6.4, seeing added support for RISC-V Vector Extensions and Arm Scalable Matrix Extensions. Geekbench is a highly-used benchmark tool, providing ...
FOX40 News

Andes Technology Unveils Andes D23 and N225 Cores Pioneering the Next Generation of Compact, Performant, and Secure RISC-V Processor Technology

Hsinchu, Taiwan, Oct. 17, 2023 (GLOBE NEWSWIRE) -- Andes Technology, the renowned supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and a Founding Premier member of RISC-V ...
Electronic Design

Andes Certifies Imperas RISC-V Reference Models for RISC-V P (SIMD/DSP) Extension

Imperas simulation technology and RISC-V reference models updated to cover the RISC-V P Extension for SoC architecture exploration and early software development. RISC-V ISA (Instruction Set ...